I recently became curious what exactly ptx instructions can produce nvidia compiler - like if it uses something totally undocumented or vice versa - some official ptx instructions are never generated during compilation
The first thing is where those compiler located - no, it's not nvcc. Real compiler is cicc from packet cuda-nvvm. cicc from v10 has size 21Mb. The strings utility shows many interesting things, like
Portions Copyright (c) 1988-2016 Edison Design Group, Inc.
Portions Copyright (c) 2007-2016 University of Illinois at Urbana-Champaign.
Based on Edison Design Group C/C++ Front End
So they use front-end from Edison Design Group and llvm as back-end
Then I extracted several tables:
- compiler errors
- list of built-in functions with prototypes
- list of llvm attributes - as you can see they are mostly correspond to nvvm LLVM dialect
- and finally what I looked for - list with internal instruction names& their bodies to place into PTX file
As you can see mapping is very straightforward - for example for instruction BFE_S32rii (index 0x27) generating PTX bfe.s32
Results
I found only minor PTX instructions not presented in their official documentations: suq.xxx - perhaps should mean surface qword or something like this